Practical Process Design for Microlithography

The microlithography process is critical to the successful manufacture of integrated circuits. Excellent control of the critical dimension, (CD), of the device is paramount to producing devices that meet design specification. There are eight integral process categories to consider in controlling feature size. They are: substrate (type and surface preparation), resist (type and characteristics), resist apply, post-apply bake, exposure, post-exposure bake, resist development, and masking (post development treatment, etch, ion implant and strip).

This course looks at each category and discusses the impact that variation of the most critical parameters has on the lithography process, device yield and final device performance; then discusses useful ways to design robust processes, integrating each category's component with the whole of the process. Emphasis is placed on the chemical and physical interrelationships within the lithography process. Ways to monitor this critical relationship and ways of using it for process tuning will be emphasized for typical g and I-line novolak photoresists, and for the newer deep UV chemically amplified photoresists. Knowing how to tune the process is especially critical now that production is moving below the historical limits. This course will consider lithography methods and process tuning appropriate for production lithography at or below these limits.

After completing this course, you will be able to:

1. Relate lithographic performance to DRAM and Microprocessor function and performance
2. Identify the principle components of the lithography process
3. Distinguish critical process differences between I-line and DUV processes
4. Identify the sources of variation within the lithographic process and methods to minimize their effects
5. Use bulk resist responses during initial process setup and process maintenance
6. Fine tune the process through the use of pre-targeting experiments and judicious use of designed experiments that use bulk resist and resist imaging responses.

Course Outline

Introduction, Overview of Lithography Process

• Motivation for CD Control
• Overview of Role of Lithography in Semiconductor Processing
• Lithography Process Overview
• Discuss Decomposition of CD Control into Components

Resist Chemistry

• Diazonapthoquinone Resists
• Chemically Amplified Resists

Prime, Apply, Post-Apply Bake

• Prime (Substrate Preparation)
• Apply
• Post-Apply Bake (Softbake)

Exposure Optimization

• Basic Imaging System
• Effects of Reflected Light
• Non-Ideal Imaging
• Focus Budget Consumption
• Mask Bias Optimization

Post-Exposure Bake and Develop Optimization

• Role of Post-Exposure Bake
• Role of Develop
• Sub E₀ Testing
• Chemical Contamination in Chemically Amplified Resists
• Process Optimization Example

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